In an existing active matrix organic light emitting diode (AMOLED) panel, pixel arrangement is typically real arrangement. Such arrangement is easy for construction, layout design, mask production and production process.
As shown in FIG. 1a, a conventional AMOLED panel includes a substrate module 1′, a passivation layer 2′, a planarization layer 3′, a pixel definition layer 7′, a transparent conductive layer 4′ and an organic light emitting layer 6′. The passivation layer 2′ is formed over the substrate module 1′, and the planarization layer 3′ is formed over the passivation layer 2′. The pixel definition layer 7′ is formed over an insulating layer, contains a plurality of openings, and can be disposed at the same layer and made of the same material as the planarization layer 3′. The transparent conductive layer 4′ is formed at the surface of the insulating layer, and includes an opening region 4a′ and a non-opening region 4b′ of the transparent conductive layer. The opening region 4a′ of the transparent conductive layer is disposed in the plurality of openings of the pixel definition layer 7′, and the non-opening region 4b′ of the transparent conductive layer is disposed between the insulating layer and the pixel definition layer 7′. The organic light emitting layer 6′ is formed over the opening region 4a′ of the transparent conductive layer, to correspondingly form a plurality of sub-pixels. The surface area of the opening region 4a′ of the transparent conductive layer or the surface area of the organic light emitting layer 6′ is the same as the surface area of the opening. The light emitting area of a single sub-pixel equals to the planarization area of the opening. As shown in FIG. 1a, there are three segments of opening regions 4a′ of the transparent conductive layer which are positioned respectively corresponding to a red sub-pixel R′, a green sub-pixel G′, and a blue sub-pixel B′.
In addition, as shown in FIG. 1b, a numeral reference 8′ denotes a via hole in the insulating layer, a numeral reference 9′ denotes a TFT in a substrate module, and a numeral reference 10′ denotes a cathode of an organic light emitting unit. The non-opening region 4b′ of the transparent conductive layer is connected to the TFT 9′ in the non-opening region through the via hole 8′.
However, with popularity of smart phones, high PPI (high resolution, the number of pixels per inch, Pixels per inch) has become a main objective of AMOLED.
Since light emitting points of pixels of the AMOLED are produced with fine metal mask through a deposition process, when the panel is produced to have a high PPI, aperture ratios of the pixels will be reduced due to the requirements of the process and the limitation of the mask.
When the aperture ratio of the pixels is reduced, the area of the light emitting region will be reduced. In this case, since a current for the entire panel is preset as fixed, a current density for each pixel will be increased. As shown in FIG. 2, from the curve (J-V Curve) of the current density of the AMOLED panel against voltage it can be seen that, the voltage increases with the current density increases.
For example, with two aperture ratios A and B (the aperture ratio B is smaller than the aperture ratio A), reduction in aperture ratios results in about 10% to 15% increase in power consumption of the product. For a portable phone, this change is extremely unfavorable. Then, how to realize high PPI without additionally increase the power consumption has become an important issue.
It is proposed in the industry a color rendering method which can ensure high PPI without reducing the aperture ratio. However, such a method has the following disadvantages.
1. The display effect of rendering is not as good as the real arrangement, and has problem such as slash burr.
2. The circuit (IC) will become complicated, and significantly increase the cost.
3. Lack of core algorithm patents.
In view of the above, the inventor provides a display device which has low power consumption and a manufacture method thereof.
In addition, since in an AMOLED panel of the prior art, each sub-pixel is provided with sufficient voltage margin to ensure the voltage of respective sub-pixel. The sub-pixels requires sufficient voltage margin to ensure the voltage of respective sub-pixels. In this case, some sub-pixels may have a voltage greater than its required voltage, resulting in redundant voltage supplies, and the resulted waste in power consumption may cause a bottleneck in the overall settings.
In order to overcome the above problems, the present disclosure provides a display device which has low power consumption and a manufacture method thereof.